1. Field
The present invention relates to a semiconductor design technology and, more particularly, to a semiconductor memory device and a method of testing the same.
2. Description of the Related Art
In a semiconductor memory device, bit lines and word lines cross each other where their corresponding memory cells are located, and a cell transistor that stores data is arranged between each word line and each bit line. The cell transistor has a gate coupled to the word line, as well as a source and drain path coupled between the bit line and a capacitor. The node to which the drain of the cell transistor is coupled is typically referred to as a storage node. Furthermore, the contact where the source is located is referred to as the bit line contact (BLC), and a contact where the drain region is located is referred to as the storage node contact (SNC).
FIG. 1 is a diagram illustrating a conventional memory cell structure.
In a memory device including the memory cell illustrated in FIG. 1, a micro bridge may be formed between a word line WL and a storage node or between the word line WL and a bit line BL, when a storage node contact SNC and a bit line contact BLC are abnormally fabricated, or when there is a fabrication defect. This may result in a failure due to leakage of current through the micro bridge. Thus, the memory device performs a test operation to determine whether a failure (i.e. a defect) has occurred.
Such a test operation may be performed as follows. First, a plurality of word lines are enabled to write data to the corresponding memory cell through a write operation. Then, during a read operation a sense amplifier (SA) is enabled to determine whether the micro bridge is formed between the word line and the storage node or between the word line and the bit line.
During the test operation, however, one word line of the plurality of word lines may be initially enabled to write data to the memory cell in response to an external write command, and the data written to the memory cell corresponding to one word line may be used to test the other word lines. That is, the write operation on the initial one word line is not a write operation which is performed during the test operation, but a write operation which is performed during a normal operation. Thus, it inevitably becomes difficult to perform a test operation on the initial one word line.